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Silicon Labs /Series1 /EFR32BG12P /EFR32BG12P132F1024GM48 /CMU /LFRCOCTRL

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Interpret as LFRCOCTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TUNING0 (ENVREF)ENVREF 0 (ENCHOP)ENCHOP 0 (ENDEM)ENDEM 0 (32CYCLES)VREFUPDATE 0 (2CYCLES)TIMEOUT 0GMCCURTUNE

VREFUPDATE=32CYCLES, TIMEOUT=2CYCLES

Description

LFRCO Control Register

Fields

TUNING

LFRCO Tuning Value
ENVREF

Enable Duty Cycling of Vref
ENCHOP

Enable Comparator Chopping
ENDEM

Enable Dynamic Element Matching
VREFUPDATE

Control Vref Update Rate

0 (32CYCLES): 32 clocks.

1 (64CYCLES): 64 clocks.

2 (128CYCLES): 128 clocks.

3 (256CYCLES): 256 clocks.
TIMEOUT

LFRCO Timeout

0 (2CYCLES): Timeout period of 2 cycles

1 (16CYCLES): Timeout period of 16 cycles

2 (32CYCLES): Timeout period of 32 cycles
GMCCURTUNE

Tuning of Gmc Current

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data